240°-Clamped Space Vector PWM to Achieve Superior Waveform Quality and Low Common Mode Noise in Electric Vehicle Powertrains and Grid-Connected Photovoltaic Converters

The performance of voltage source inverter (VSI) in terms of output waveform quality, conversion efficiency and common mode noise depends greatly on the pulse width modulation (PWM) method. In this work, a low-loss space vector PWM i.e., 240°-clamped space vector PWM (240CPWM) is proposed to improve the performance of VSIs in electric/hybrid electric vehicles (EV/HEVs) and grid connected photovoltaic (PV) systems. The salient features of 240CPWM include 240° clamping of each phase pole to positive or negative DC bus in a fundamental cycle ensuring that switching losses are reduced by a factor of seven as compared to conventional space vector PWM (CSVPWM) at unity power factor. Zero states are completely eliminated and only two nearest active states are used ensuring that there is no penalty in terms of total harmonic distortion (THD) in line current. The THD of the line current is analyzed using the notion of stator flux ripple and compared with conventional and discontinuous PWM method. Discontinuous PWM methods achieve switching loss reduction at the expense of higher THD while 240CPWM achieves a much greater loss reduction without impacting the THD. The analysis and performance of 240CPWM are validated on a 10 kW two-stage experimental prototype. Common mode voltage (CMV) and leakage current characteristics of 240CPWM are analyzed in detail. It is shown analytically that 240CPWM reduces the CMV and leakage current as compared to other PWM methods while simultaneously reducing the switching loss and THD. Experimental results from a 10-kW hardware prototype conform to the analytical discussions and validate the superior performance of 240CPWM. 240CPWM requires a six-pulse dynamic DC link voltage that introduces low frequency harmonics in DC input current and/or AC line currents that can affect maximum power point tracking, battery life or THD in line current. Four topologies have been proposed to minimize the low frequency harmonics in input and line currents in grid-connected PV system with 240CPWM. In order to achieve further benefits in terms of THD and device stress reduction, 240CPWM is extended to three-level inverters. The performance metrics such as THD and switching loss for 240CPWM are analyzed in three-level inverter.